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  EN025 (v1.0) october 19, 2007 www.xilinx.com 1 errata notice ? 2007 xilinx, inc. all rights reserved. all xilinx trademarks, registered trademarks, patents, and disclaimers are as listed a t http://www.xilinx.com/legal.htm . all other trademarks and registered trademarks are the property of their respective owners. all specifications are subject to c hange without notice. hardware errata there are no errata for the spartan-3e xc3s250e fpga. see the ?production stepping? section in th e data sheet for additional information: http://www.xilinx.com/bvdocs/publications/ds312.pdf advisories this section advises designers of any potential software changes that may affect their xc3s250e fpga applications. ta b l e 1 summarizes the advisories and indicates which software update will correct the issue. persist i/o conflict applications affected this issue affects applications that use the persist option in the bitstream generator and use configuration address pins a20-a23 in the design. the current software allows this conflict between persist and user functionality, so the user must be careful to avoid this situation. persist is set to no by default, and can be enabled by persist:yes at the command line or "allow selectmap pins to persist" in the project navigator. persist is most commonly used to allow readback through the slave parallel (selectmap) configuration port after configuration. this issue affects xc3s250e devices in the cp(g)132, pq(g)208, and ft(g)256 packages. this does not affect xc3s250e devices in the vq(g)100 and tq(g)144 packages. description using the persist option in the bitstream generator, and setting the mode pins to a parallel configuration mode including byte peripheral interface (bpi) or slave parallel (selectmap) modes, will retain the parallel configuration interface. this is useful when configuring in the selectmap mode to allow configuration commands such as readback to be used after configuration. the pins affected by persist cannot be used in the design, including m[2:0], cclk, d[7:0], init_b, csi_b, rdwr_b, and busy, as described in the documentation. the issue is that persist will block four additional specific dual-purpose i/os from use by the design when persist is enabled and the mode pins are set for a parallel configuration mode. these pins become disconnected from the user design when persist is used and therefore cannot be used by the design. if unused in the design, these pins will have a weak pull-down resistor when persist is used. if used in the design, the pin state is design-dependent. the affected i/os are the highest order address lines for the configuration interface, a20-a23. the associated pin numbers are shown in ta b l e 2 . no other address lines will be affected by persist. 0 spartan-3e xc3s250e fpga errata EN025 (v1.0) october 19, 2007 00 errata notice table 1: advisories and software update advisory ise? software version ?persist i/o conflict? 10.1 table 2: affected pins package a20 a21 a22 a23 cp(g)132 m10 n10 m9 n9 pq(g)208 p97 p96 p94 p93 ft(g)256 n12 p12 p11 r11
spartan-3e xc3s250e fpga errata 2 www.xilinx.com EN025 (v1.0) october 19, 2007 errata notice r this issue affects all spartan-3e part/package combinations that support a20-a23. this issue does not affect the xc3s100e device, or the vq(g)100 and tq(g)144 packages. workaround customers who use the persist option in the bitstream generator and who use a parallel configuration mode must not use the affected i/o pins in the design. no i/o should be placed on these pins by the user, and the pins need to be prohibited for the tools by using the prohibit constraint on each pin. this constraint can be specified in the user constraints file (ucf) with the following syntax: config prohibit=m10,n10,m9,n9; alternatively, consider not using persist if post-configuration readback is not required. these pins will be added to the list of pins that persist in the documentation. in ise software version 10.1 and later, an error message will be provided by the bitstream generator if persist is used and the design uses these four pins. additional questions or clarifications all other device functionality and timing meet the data sheet specifications. for questions, please contact xilinx technical support h ttp://www.xilinx.com/support/clearexpress/websupport.htm or your xilinx sales representative, h ttp://www.xilinx.com/company/contact.htm . obtaining errata notification updates if this document is printed or saved locally, please check for the most recent release, available to registered users on the xilinx web site at h ttp://www.xilinx.com/xlnx/xweb/xil_publications_index.jsp?category=errata . to receive an e-mail alert when this document changes, sign up at htt p://www.xilinx.com/xlnx/xil_ans_display.jsp?getpagepath=18815 . applicable documents these errata apply to the following xc3s250e documents: ? ds312: spartan tm -3e fpga family data sheet www.xilinx.com/bvdocs/publications/ds312.pdf ? ug331: spartan-3 generation fpga user guide www.xilinx.com/bvdocs/userguides/ug331.pdf ? ug332: spartan-3 generation configuration user guide www.xilinx.com/bvdocs/userguides/ug332.pdf revision history the following table shows the revision history for this document. date version description 10/19/07 1.0 initial version


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